View SSM2311CBZ-REEL_4141904.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Filterless High Efficiency Mono 3 W Class-D Audio Amplifier SSM2311
FEATURES
Filterless Class-D amplifier with - modulation No sync necessary when using multiple Analog Devices, Inc., Class-D amplifiers 3 W into 3 load and 1.4 W into 8 load at 5.0 V supply with less than 10% total harmonic distortion (THD) 90% efficiency at 5.0 V, 1.4 W into 8 speaker Better than 98 dB signal-to-noise ratio (SNR) Single-supply operation from 2.5 V to 5.5 V 20 nA ultralow shutdown current Short-circuit and thermal protection Available in 9-ball, 1.5 mm x 1.5 mm WLCSP Pop-and-click suppression Built-in resistors reduce board component count Default fixed 18 dB or user-adjustable gain setting
The SSM2311 features a high efficiency, low noise modulation scheme that does not require any external LC output filters. The modulation continues to provide high efficiency even at low output power. It operates with 90% efficiency at 1.4 W into 8 or 85% efficiency at 3 W into 3 from a 5.0 V supply and has an SNR that is better than 98 dB. Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures. The SSM2311 has a micropower shutdown mode with a typical shutdown current of 20 nA. Shutdown is enabled by applying a logic low to the SD pin. The device also includes pop-and-click suppression circuitry. This minimizes voltage glitches at the output during turn-on and turnoff, thus reducing audible noise on activation and deactivation. The fully differential input of the SSM2311 provides excellent rejection of common-mode noise on the input. Input coupling capacitors can be omitted if the dc input common-mode voltage is approximately VDD/2. The default gain of SSM2311 is 18 dB, but users can reduce the gain by using a pair of external resistors (see the Gain section). The SSM2311 is specified over the industrial temperature range (-40C to +85C). It has built-in thermal shutdown and output short-circuit protection. It is available in a 9-ball, 1.5 mm x 1.5 mm wafer level chip scale package (WLCSP).
APPLICATIONS
Mobile phones MP3 players Portable gaming Portable electronics Educational toys
GENERAL DESCRIPTION
The SSM2311 is a fully integrated, high efficiency, Class-D audio amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 3 W of continuous output power with less than 1% THD + N driving a 3 load from a 5.0 V supply.
FUNCTIONAL BLOCK DIAGRAM
10F 0.1F VBATT 2.5V TO 5.0V VDD OUT+ MODULATOR 37.5k 300k SHUTDOWN 300k (37.5k + R EXT )
1 INPUT
SSM2311
22nF1 AUDIO IN+ AUDIO IN- REXT IN+ IN- 22nF1 REXT 37.5k
300k
FET DRIVER
OUT-
SD
BIAS
OSCILLATOR GND
POP-AND-CLICK SUPPRESSION
GAIN =
CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY VDD/2.
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved.
06161-001
SSM2311 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions............................. 5 Typical Performance Characteristics ............................................. 6 Typical Application Circuits ......................................................... 13 Application Notes ........................................................................... 15 Overview ..................................................................................... 15 Gain.............................................................................................. 15 Pop-and-Click Suppression ...................................................... 15 Layout .......................................................................................... 15 Input Capacitor Selection.......................................................... 16 Proper Power Supply Decoupling ............................................ 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 17
REVISION HISTORY
1/08--Revision 0: Initial Version
Rev. 0 | Page 2 of 20
SSM2311 SPECIFICATIONS
VDD = 5.0 V, TA = 25oC, RL = 8 , unless otherwise noted. Table 1.
Parameter DEVICE CHARACTERISTICS Output Power Symbol PO Conditions RL = 8 , THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 8 , THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 8 , THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 8 , THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 4 , THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 4 , THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 4 , THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 4 , THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 3 , THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 3 , THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V RL = 3 , THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V RL = 3 , THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V POUT = 1.4 W, 8 , VDD = 5.0 V PO = 3 W into 3 , f = 1 kHz, VDD = 5.0 V PO = 1 W into 8 , f = 1 kHz, VDD = 5.0 V 1.0 VCM = 2.5 V 100 mV at 217 Hz input referred G = 18 dB Guaranteed from PSRR test VDD = 2.5 V to 5.0 V, dc input floating/ground VRIPPLE = 100 mV at 217 Hz, inputs ac GND, CIN = 0.1 F VIN = 0 V, no load, VDD = 5.0 V VIN = 0 V, no load, VDD = 3.6 V VIN = 0 V, no load, VDD = 2.5 V SD = GND 2.5 70 60 800 2.0 Min Typ 1.2 0.615 1.53 0.77 2 1.4 2.3 1.6 3 1.8 3.3 2.5 89 0.5 0.2 VDD - 1.0 Max Unit W W W W W W W W W W W W % % % V dB kHz mV V dB dB mA mA mA nA dB k V V ms s k V dB
Efficiency Total Harmonic Distortion + Noise Input Common-Mode Voltage Range Common-Mode Rejection Ratio Average Switching Frequency Differential Output Offset Voltage POWER SUPPLY Supply Voltage Range Power Supply Rejection Ratio
THD + N VCM CMRRGSM fSW VOOS VDD PSRR PSRRGSM ISY
12.0 5.0
85 60 5.5 4.5 4.0 20 18 37.5 1.2 0.5 30 5 >100 35 98
Supply Current
Shutdown Current GAIN CONTROL Closed-Loop Gain Differential Input Impedance SHUTDOWN CONTROL Input Voltage High Input Voltage Low Turn-On Time Turn-Off Time Output Impedance NOISE PERFORMANCE Output Voltage Noise Signal-to-Noise Ratio
ISD Av ZIN VIH VIL tWU tSD ZOUT en SNR
SD = VDD ISY 1 mA ISY 300 nA SD rising edge from GND to VDD SD falling edge from VDD to GND SD = GND VDD = 3.6 V, f = 20 Hz to 20 kHz, inputs are ac grounded, AV = 18 dB, A weighting POUT = 1.4 W, RL = 8
Rev. 0 | Page 3 of 20
SSM2311 ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings apply at 25C, unless otherwise noted. Table 2.
Parameter Supply Voltage Input Voltage Common-Mode Input Voltage Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) Rating 6V VDD VDD -65C to +150C -40C to +85C -65C to +165C 300C
THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance
Package Type 9-Ball, 1.5 mm x 1.5 mm WLCSP PCB 1S0P1 2S0P1 JA 162 76 JB 38.5 21 Unit C/W C/W
1
Referencing the JEDEC thermal standard.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. 0 | Page 4 of 20
SSM2311 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALL A1 CORNER
1 A 2 3
B
C
SSM2311
TOP VIEW (BALL SIDE DOWN) Not to Scale
06161-002
Figure 2. SSM2311 WLCSP Pin Configuration
Table 4. Pin Function Descriptions
Pin No. 2C 1A 1C 3C 1B 2A, 3B 3A 2B Mnemonic SD IN+ IN- OUT- VDD GND OUT+ PVDD Description Shutdown Input. Active low digital input. Noninverting Input. Inverting Input. Inverting Output. Power Supply. Ground. Noninverting Output. Power Supply.
Rev. 0 | Page 5 of 20
SSM2311 TYPICAL PERFORMANCE CHARACTERISTICS
100 RL = 8, 33H GAIN = 18dB VDD = 2.5V 100 GAIN = 6dB RL = 4, 33H 10 10 VDD = 2.5V THD + N (%) THD + N (%) 1 1
0.1
VDD = 3.6V VDD = 5V
0.1
VDD = 3.6V
0.01
0.01
VDD = 5V
06161-027
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 3. THD + N vs. Output Power into 8 , AV = 18 dB
Figure 6. THD + N vs. Output Power into 4 , AV = 6 dB
100
RL = 8, 33H GAIN = 6dB VDD = 2.5V
100
GAIN = 18dB RL = 3, 33H VDD = 2.5V
10
10
THD + N (%)
THD + N (%)
1
1
0.1
VDD = 3.6V VDD = 5V
0.1 VDD = 3.6V
0.01
0.01 VDD = 5V
06161-028
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 4. THD + N vs. Output Power into 8 , AV = 6 dB
Figure 7. THD + N vs. Output Power into 3 , AV = 18 dB
100
GAIN = 18dB RL = 4, 33H
100
RL = 3, 33H GAIN = 6dB VDD = 2.5V
10 VDD = 2.5V THD + N (%) THD + N (%) 1
10
1 VDD = 3.6V 0.1
0.1
VDD = 3.6V
0.01 VDD = 5V 0.001 0.0001
0.001 VDD = 5V 0.001 0.0001
06161-029
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 5. THD + N vs. Output Power into 4 , AV = 18 dB
Rev. 0 | Page 6 of 20
Figure 8. THD + N vs. Output Power into 3 , AV = 6 dB
06161-032
06161-031
0.001 0.0001
0.001 0.0001
06161-030
0.001 0.0001
0.001 0.0001
SSM2311
100 VDD = 5V GAIN = 18dB RL = 8, 33H
100
VDD = 3.6V GAIN = 18dB RL = 8, 33H
10
10
THD + N (%)
1W 0.1
THD + N (%)
1
1 0.5W 0.1
0.01
0.5W 0.25W
06161-033
0.01
0.25W 0.125W
100
1k FREQUENCY (Hz)
10k
100k
100
1k FREQUENCY (Hz)
10k
100k
Figure 9. THD + N vs. Frequency, VDD = 5.0 V, RL = 8 , AV = 18 dB
Figure 12. THD + N vs. Frequency, VDD = 3.6 V, RL = 8 , AV = 18 dB
100
VDD = 5V GAIN = 18dB RL = 4, 33H
100
10
VDD = 3.6V GAIN = 18dB RL = 4, 33H
10
THD + N (%)
THD + N (%)
1
2W
1
1W
0.1
0.1 0.5W
0.01
1W 0.5W
0.01 0.25W
06161-034
100
1k FREQUENCY (Hz)
10k
100k
100
1k FREQUENCY (Hz)
10k
100k
Figure 10. THD + N vs. Frequency, VDD = 5.0 V, RL = 4 , AV = 18 dB
Figure 13. THD + N vs. Frequency, VDD = 3.6 V, RL = 4 , AV = 18 dB
100
VDD = 5V GAIN = 18dB RL = 3, 33H
100
VDD = 3.6V GAIN = 18dB RL = 3, 33H
10
10
THD + N (%)
3W 0.1 1.5W 0.01 0.75W
06161-035
THD + N (%)
1
1
1.5W
0.1
0.75W
0.01 0.38W 10k 100k 100 1k FREQUENCY (Hz) 10k 100k
06161-038
0.001 10
100
1k FREQUENCY (Hz)
0.001 10
Figure 11. THD + N vs. Frequency, VDD = 5.0 V, RL = 3 , AV = 18 dB
Figure 14. THD + N vs. Frequency, VDD = 3.6 V, RL = 3 , AV = 18 dB
Rev. 0 | Page 7 of 20
06161-037
0.001 10
0.001 10
06161-036
0.001 10
0.001 10
SSM2311
100 VDD = 2.5V GAIN = 18dB RL = 8, 33H
SUPPLY CURRENT (mA)
5.2 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.9
0.075W
NO LOAD
10
THD + N (%)
1
0.25W
0.1 0.125W 0.01
3.4 3.0 3.5 4.0 4.5 5.0 5.5
06161-042
100
1k FREQUENCY (Hz)
10k
100k
06161-039
0.001 10
3.2 2.5
SUPPLY VOLTAGE (V)
Figure 15. THD + N vs. Frequency, VDD = 2.5 V, RL = 8 , AV = 18 dB
Figure 18. Supply Current vs. Supply Voltage, No Load
100
VDD = 2.5V GAIN = 18dB RL = 4, 33H
SHUTDOWN CURRENT (mA)
12
10
10
8 VDD = 5V 6 VDD = 3.6V VDD = 2.5V 2
THD + N (%)
1
0.5W
0.1
4
0.01 0.125W 0.001 10 100 1k FREQUENCY (Hz) 0.25W
06161-040
10k
100k
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
SHUTDOWN VOLTAGE (V)
Figure 16. THD + N vs. Frequency, VDD = 2.5 V, RL = 4 , AV = 18 dB
Figure 19. Shutdown Current vs. Shutdown Voltage
100
VDD = 2.5V GAIN = 18dB RL = 3, 33H
2.0 1.8 1.6
OUTPUT POWER (W)
10 0.75W
THD + N (%)
f = 1kHz GAIN = 18dB RL = 8, 33H
1.4 1.2 1.0 0.8 0.6 0.4
10%
1
1%
0.1 0.38W 0.01 0.2W 100 1k FREQUENCY (Hz) 10k 100k
06161-041
0.2 3.0 3.5 4.0 4.5 5.0
06161-044
0.001 10
0 2.5
SUPPLY VOLTAGE (V)
Figure 17. THD + N vs. Frequency, VDD = 2.5 V, RL = 3 , AV = 18 dB
Figure 20. Maximum Output Power vs. Supply Voltage, RL = 8 , AV = 18 dB
Rev. 0 | Page 8 of 20
06161-043
0
SSM2311
3.5 3.0 2.5 2.0 1% 1.5 1.0 0.5 0 2.5 f = 1kHz GAIN = 18dB RL = 4, 33H 10%
OUTPUT POWER (W)
3.5 3 2.5 2.0 1.5 1.0 0.5 0 2.5 f = 1kHz GAIN = 6dB RL = 4, 33H
OUTPUT POWER (W)
10%
1%
06161-045
3.0
3.5
4.0
4.5
5.0
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 21. Maximum Output Power vs. Supply Voltage, RL = 4 , AV = 18 dB
Figure 24. Maximum Output Power vs. Supply Voltage, RL = 4 , AV = 6 dB
4.5 4.0 3.5
OUTPUT POWER (W)
4.5 f = 1kHz GAIN = 18dB RL = 3, 33H
OUTPUT POWER (W)
4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
06161-046
f = 1kHz GAIN = 6dB RL = 3, 33H
3.0 2.5 2.0 1.5 1.0 0.5 0 2.5
10%
1%
10%
1%
3.0
3.5
4.0
4.5
5.0
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 22. Maximum Output Power vs. Supply Voltage, RL = 3 , AV = 18 dB
Figure 25. Maximum Output Power vs. Supply Voltage, RL = 3 , AV = 6 dB
2.0 1.8 1.6
OUTPUT POWER (W)
100 f = 1kHz GAIN = 6dB RL = 8, 33H 90 80 70
EFFICIENCY (%)
VDD = 3.6V VDD = 2.5V
VDD = 5V
1.4 1.2 1.0 1% 0.8 0.6 0.4 0.2
06161-047
10%
60 50 40 30 20 10
3.0
3.5
4.0
4.5
5.0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
SUPPLY VOLTAGE (V)
OUTPUT POWER (W)
Figure 23. Maximum Output Power vs. Supply Voltage, RL = 8 , AV = 6 dB
Figure 26. Efficiency vs. Output Power into 8
Rev. 0 | Page 9 of 20
06161-050
0 2.5
0
RL = 8, 33H
06161-049
0 2.5
06161-048
SSM2311
100 90 80 70
EFFICIENCY (%)
0.30
VDD = 2.5V
0.25
VDD = 5V VDD = 3.6V
POWER DISSIPATION (W)
0.20
60 50 40 30 20 10 0 0.2
0.15
0.10
0.05
RL = 4, 33H 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
06161-073
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 27. Efficiency vs. Output Power into 4
Figure 30. Power Dissipation vs. Output Power into 4 at VDD = 5.0 V
100 90 80 70
EFFICIENCY (%)
0.6
VDD = 2.5V
0.5
VDD = 5V VDD = 3.6V
POWER DISSIPATION (W)
0.4
60 50 40 30 20 10
06161-051
0.3
0.2
0.1
0.8
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 28. Efficiency vs. Output Power into 3
Figure 31. Power Dissipation vs. Output Power into 3 at VDD = 5.0 V
0.14 VDD = 5V RL = 8, 33H 0.12
POWER DISSIPATION (W)
0.10
0.08
POWER DISSIPATION (W)
0.10
0.06
0.08
0.04
0.06
0.02 VDD = 3.6V RL = 8, 33H 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
06161-054
06161-074
0.04
0 0.1 0.2 0.3 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 0.4 1.5
0
OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 29. Power Dissipation vs. Output Power into 8 at VDD = 5.0 V
Figure 32. Power Dissipation vs. Output Power into 8 at VDD = 3.6 V
Rev. 0 | Page 10 of 20
06161-053
0
0.2 0.4 0.6 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 0
RL = 3, 33H
2.6 2.8 3.0 3.2 3.4 3.6
0
VDD = 5V RL = 3, 33H
06161-052
0
0
VDD = 5V RL = 4, 33H
SSM2311
0.24 VDD = 3.6V 0.22 R = 4, 33H L 0.20
POWER DISSIPATION (W)
600
500
VDD = 3.6V
0.18 0.16
ISY (mA)
400
VDD = 5V VDD = 2.5V
0.14 0.12 0.10 0.08 0.06 0.04 0.02
06161-055
300
200
100 RL = 4, 33H 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4
06161-057
06161-059 06161-058
0
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 33. Power Dissipation vs. Output Power into 4 at VDD = 3.6 V
Figure 36. Supply Current vs. Output Power into 4
0.40 0.35
POWER DISSIPATION (W)
VDD = 3.6V RL = 3, 33H
800 700 600 500
ISY (mA)
0.30 0.25 0.20 0.15 0.10 0.05 0
VDD = 3.6V VDD = 5V VDD = 2.5V
400 300 200 100 0
RL = 3, 33H 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 OUTPUT POWER (W)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
OUTPUT POWER (W)
06161-072
Figure 34. Power Dissipation vs. Output Power into 3 at VDD = 3.6 V
Figure 37. Supply Current vs. Output Power into 3
350 300 VDD = 3.6V 250 200 150 100 50 0 RL = 8, 33H 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
06161-056
0 -10 -20 -30 VDD = 5V
PSRR (dB)
-40 -50 -60 -70 -80 -90 -100 10 100 1k FREQUENCY (Hz) 10k 100k
ISY (mA)
VDD = 2.5V
OUTPUT POWER (W)
Figure 35. Supply Current vs. Output Power into 8
Figure 38. Power Supply Rejection Ratio vs. Frequency
Rev. 0 | Page 11 of 20
SSM2311
0 -10 -20 VOLTAGE (V) -30 -40 -50 -60 -70 -80 10 RL = 8, 33H 7 6 5 4 3 2 1 0 -1
06161-060 06161-062
SD INPUT
CMRR (dB)
OUTPUT
100
1k FREQUENCY (Hz)
10k
100k
-2 -10
0
10
20
30
40 TIME (ms)
50
60
70
80
90
Figure 39. Common-Mode Rejection Ratio vs. Frequency
Figure 41. Turn-On Response
0 -20 -40
CROSSTALK (dB)
VDD = 3.6V VRIPPLE = 1V rms RL = 8, 33H
7 6 5 4 SD INPUT OUTPUT
-60 -80 -100
VOLTAGE (V)
06161-061
3 2 1 0
-120 -140 10
-1
06161-063
100
1k FREQUENCY (Hz)
10k
100k
-2 -20
0
20
40
60
80
100
120
140
160
180
TIME (ms)
Figure 40. Crosstalk vs. Frequency
Figure 42. Turn-Off Response
Rev. 0 | Page 12 of 20
SSM2311 TYPICAL APPLICATION CIRCUITS
10F 0.1F VBATT 2.5V TO 5.0V VDD OUT+ MODULATOR 37.5k 300k SHUTDOWN SD BIAS OSCILLATOR GND
06161-019
SSM2311
22nF1 AUDIO IN+ AUDIO IN- 22nF1 IN+ IN- 37.5k
300k
FET DRIVER
OUT-
POP/CLICK SUPPRESSION
1 INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY VDD/2.
Figure 43. Differential Input Configuration
10F 0.1F
VBATT 2.5V TO 5.0V VDD OUT+
SSM2311
22nF1 AUDIO IN+ 22nF1 IN+ IN- 37.5k 37.5k
300k
MODULATOR
FET DRIVER
OUT-
300k SHUTDOWN SD BIAS OSCILLATOR GND
06161-020
POP/CLICK SUPPRESSION
1 INPUT
CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY VDD/2.
Figure 44. Single-Ended Input Configuration
Rev. 0 | Page 13 of 20
SSM2311
10F 0.1F VBATT 2.5V TO 5.0V VDD OUT+ MODULATOR 37.5k 300k SHUTDOWN 300k (37.5k + R EXT )
1 INPUT
SSM2311
AUDIO IN+ AUDIO IN- 22nF1 R EXT IN+ IN- 22nF1 REXT 37.5k
300k
FET DRIVER
OUT-
SD
BIAS
OSCILLATOR GND
POP/CLICK SUPPRESSION
GAIN =
CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY VDD/2.
Figure 45. Differential Input Configuration, User-Adjustable Gain
10F 0.1F
VBATT 2.5V TO 5.0V VDD OUT+
SSM2311
AUDIO IN+ 22nF1 R EXT IN+ IN- 22nF1 REXT 37.5k 37.5k
300k
MODULATOR
FET DRIVER
OUT-
300k SHUTDOWN 300k (37.5k + R EXT )
1 INPUT
SD
BIAS
OSCILLATOR GND
POP/CLICK SUPPRESSION
GAIN =
CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY VDD/2.
Figure 46. Single-Ended Input Configuration, User-Adjustable Gain
Rev. 0 | Page 14 of 20
06161-022
06161-021
SSM2311 APPLICATION NOTES
OVERVIEW
The SSM2311 mono Class-D audio amplifier features a filterless modulation scheme that greatly reduces the external components count, conserving board space and thus reducing the system's cost. The SSM2311 does not require an output filter, but instead relies on the inherent inductance of the speaker coil and the natural filtering of the speaker and the human ear to fully recover the audio component of the square-wave output. While many Class-D amplifiers use some variation of pulse-width modulation (PWM), the SSM2311 uses - modulation to determine the switching pattern of the output devices. This provides a number of important benefits. - modulators do not produce a sharp peak with many harmonics in the AM frequency band, as pulse-width modulators often do. - modulation provides the benefits of reducing the amplitude of spectral components at high frequencies; that is, reducing EMI emission that might otherwise be radiated by speakers and long cable traces. Due to the inherent spreadspectrum nature of - modulation, the need for oscillator synchronization is eliminated for designs incorporating multiple SSM2311 amplifiers. The SSM2311 also offers protection circuits for overcurrent and temperature protection. track length for lowest DCR, and use 1 oz or 2 oz of copper PCB traces to further reduce IR drops and inductance. A poor layout increases voltage drops, consequently affecting efficiency. Use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Proper grounding guidelines help to improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. To maintain high output swing and high peak output power, the PCB traces that connect the output pins to the load and supply pins should be as wide as possible to maintain the minimum trace resistances. It is also recommended to use a large-area ground plane for minimum impedances. In addition, good PCB layouts isolate critical analog paths from sources of high interference. High frequency circuits (analog and digital) should be separated from low frequency ones. Properly designed multilayer printed circuit boards can reduce EMI emission and increase immunity to the RF field by a factor of 10 or more compared with double-sided boards. A multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double-sided board is often disrupted with signal crossover. If the system has separate analog and digital ground and power planes, the analog ground plane should be underneath the analog power plane, and, similarly, the digital ground plane should be underneath the digital power plane. There should be no overlap between analog and digital ground planes or analog and digital power planes.
70 60 50
LEVEL (dB/V)
GAIN
The SSM2311 has a default gain of 18 dB, but can be reduced by using a pair of external resistors with a value calculated as follows: External Gain Settings = 300k/(37.5k + Rext)
POP-AND-CLICK SUPPRESSION
Voltage transients at the output of audio amplifiers can occur when shutdown is activated or deactivated. Voltage transients as low as 10 mV can be heard as an audio pop in the speaker. Clicks and pops can also be classified as undesirable audible transients generated by the amplifier system and therefore as not coming from the system input signal. Such transients can be generated when the amplifier system changes its operating mode. For example, the following can be sources of audible transients: system power-up/ power-down, mute/unmute, input source change, and sample rate change. The SSM2311 has a pop-and-click suppression architecture that reduces these output transients, resulting in noiseless activation and deactivation.
40 30 20 10 0 -10 30
100 FREQUENCY (MHz)
1000
LAYOUT
As output power continues to increase, care needs to be taken to lay out PCB traces and wires properly between the amplifier, load, and power supply. A good practice is to use short, wide PCB tracks to decrease voltage drops and minimize inductance. Ensure that track widths are at least 200 mil for every inch of
Figure 47. EMI Emissions from SSM2311
Rev. 0 | Page 15 of 20
06161-076
SSM2311
INPUT CAPACITOR SELECTION
The SSM2311 does not require input coupling capacitors if the input signal is biased from 1.0 V to VDD - 1.0 V. Input capacitors are required if the input signal is not biased within this recommended input dc common-mode voltage range, if high-pass filtering is needed (Figure 43), or if using a single-ended source (Figure 44). If high-pass filtering is needed at the input, the input capacitor along with the input resistor of the SSM2311 forms a high-pass filter whose corner frequency is determined by the following equation: fC = 1/(2 x RIN x CIN) The input capacitor can significantly affect the performance of the circuit. Not using input capacitors degrades both the output offset of the amplifier and the PSRR performance.
PROPER POWER SUPPLY DECOUPLING
To ensure high efficiency, low THD, and high PSRR, proper power supply decoupling is necessary. Noise transients on the power supply lines are short-duration voltage spikes. Although the actual switching frequency can range from 10 kHz to 100 kHz, these spikes can contain frequency components that extend into the hundreds of megahertz. The power supply input needs to be decoupled with a good quality low ESL, low ESR capacitor--usually of around 4.7 F. This capacitor bypasses low frequency noises to the ground plane. For high frequency transients noises, use a 0.1 F capacitor as close as possible to the VDD pin of the device. Placing the decoupling capacitor as close as possible to the SSM2311 helps maintain efficiency performance.
Rev. 0 | Page 16 of 20
SSM2311 OUTLINE DIMENSIONS
1.575 1.515 1.455 0.65 0.59 0.53 SEATING PLANE 0.35 0.32 0.29
3 2 1 A
BALL 1 IDENTIFIER
1.750 1.690 1.630
B
0.50 BSC BALL PITCH TOP VIEW
(BALL SIDE DOWN)
C
Figure 48. 9-Ball Wafer Level Chip Scale Package [WLCSP] (CB-9-1) Dimensions shown in millimeters
ORDERING GUIDE
Model SSM2311CBZ-R2 1 SSM2311CBZ-REEL1 SSM2311CBZ-REEL71 SSM2311-EVALZ1 SSM2311-MINI-EVALZ1
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Package Description 9-Ball Wafer Level Chip Scale Package [WLCSP] 9-Ball Wafer Level Chip Scale Package [WLCSP] 9-Ball Wafer Level Chip Scale Package [WLCSP] Evaluation Board Evaluation Board, 7 mm x 7 mm
Package Option CB-9-1 CB-9-1 CB-9-1
091306-B
0.28 0.24 0.20
BOTTOM VIEW
(BALL SIDE UP)
Branding A1G A1G A1G
Z = RoHS Compliant Part.
Rev. 0 | Page 17 of 20
SSM2311 NOTES
Rev. 0 | Page 18 of 20
SSM2311 NOTES
Rev. 0 | Page 19 of 20
SSM2311 NOTES
(c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06161-0-1/08(0)
Rev. 0 | Page 20 of 20

▲Up To Search▲

Price & Availability of SSM2311CBZ-REEL

	To Download SSM2311CBZ-REEL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .